Advanced search
Start date
Betweenand
(Reference retrieved automatically from Web of Science through information on FAPESP grant and its corresponding number as mentioned in the publication by the authors.)

Influence of fin width variation on the electrical characteristics of n-type junctionless nanowire transistors at high temperatures

Full text
Author(s):
Ribeiro, Thales Augusto [1] ; Bergamaschi, Flavio Enrico [1] ; Barraud, Sylvain [2, 3] ; Pavanello, Marcelo Antonio [1]
Total Authors: 4
Affiliation:
[1] Ctr Univ FEI, Dept Elect Engn, Sao Bernardo Do Campo - Brazil
[2] Univ Grenoble Alpes, Grenoble - France
[3] LCTE CEA, SCME, MINATEC Campus, Dept Composants Silicium, LETI, Grenoble - France
Total Affiliations: 3
Document type: Journal article
Source: Solid-State Electronics; v. 185, NOV 2021.
Web of Science Citations: 1
Abstract

This work studied the effects of the fin width variation on Silicon-on-Insulator Junctionless Nanowire Transistors (JNTs) working in the temperature range of 300 K to 500 K. The effects of the temperature on the measured drain current and gate capacitance, and on the extracted electrical parameters such as the threshold voltage, the subthreshold slope, and the electron mobility were analyzed. Results show that JNTs with larger fin width may present better carrier mobility at a higher temperature than narrow ones as the degradation due to phonon scattering is decreased and the impurity scattering becomes more relevant. It is demonstrated that JNTs with narrow fin width show higher phonon scattering and higher mobility variation with the temperature than wider ones. (AU)

FAPESP's process: 16/10832-1 - Evaluation and Modeling of Charge Transport in Nanometer MOSFETs for CMOS Circuit Design
Grantee:Thales Augusto Ribeiro
Support Opportunities: Scholarships in Brazil - Doctorate
FAPESP's process: 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties
Grantee:Marcelo Antonio Pavanello
Support Opportunities: Regular Research Grants