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Fabrication and characterization of HBT, vertical MOSFET, JNT and TFET transistors based on III-V substrates with silicon nitride passivation

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Author(s):
Cássio Roberto Almeida
Total Authors: 1
Document type: Doctoral Thesis
Press: Campinas, SP.
Institution: Universidade Estadual de Campinas (UNICAMP). Faculdade de Engenharia Elétrica e de Computação
Defense date:
Examining board members:
José Alexandre Diniz; Leandro Tiago Manêra; Leonardo Breseghello Zoccal; Ricardo Cotrin Teixeira; Ricardo Toshinori Yoshioka
Advisor: José Alexandre Diniz
Abstract

This work presents the fabrication of Tunnel Field-Effect Transistors (TFET), Vertical Metal-Oxide Semiconductor Field Effect Transistor (VERTICAL-MOSFET), Junctionless Nanowire Transistor (JNT), and Heterojunction Bipolar Transistor (HBT), respectively. The devices are based on substrates grown epitaxially by the MOCVD (Metalorganic Chemical Vapor Deposition) technique, as well as by the CBE (Chemical Beam Epitaxy) technique and mainly based on the passivation method of III-V semiconductor surfaces of (GaAs) and gallium-indium phosphide heterostructures on gallium arsenide (InGaP/GaAs), using silicon nitride (SiNx) deposited by ECR-CVD (Electron Cyclotron Resonance Chemical Vapor Deposition) and developed at the Center of Semiconductors Components and Nanotechnologies (CCSNano). In order to maximize the reduction of the density of semiconductor surface states to lower levels than 1012cm-2, the passivation process, therefore, aims to reduce the leakage current in the active regions of the manufactured III-V transistors. The use of SiNx as a passivating agent allows the construction of micro/nanostructures on III-V substrates since the investigations are intense due to the high defect density in the region of the insulator-semiconductor interface. As a result of the passivation of the devices by silicon nitride, we obtained HBT transistors with maximum current gains (IC/IB) of up to 1.6x105; Vertical MOSFET with Vth values equal to 125mV and current leakage in the order of 10nA; JNT controlled by the door and with low leakage current; as well as TFET transistors presenting high transconductance values (GMMAX)/?m of approximately 215?S/?m, Subthreshold Swing (SS) of less than 60mV/dec and the ION/IOF ratio reaching values equal to 1x107. These data demonstrate that the passivation process is efficient and the high quality of silicon nitride, being fully compatible with integrated circuit manufacturing technology (AU)

FAPESP's process: 13/13983-2 - Development heterojunction bipolar transistors (HBT) and Vertical MOS Transistors with InGaP/GaAs.
Grantee:Cassio Roberto de Almeida
Support type: Scholarships in Brazil - Doctorate