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STUDY, ELECTRICAL CHARACTERIZATION AND MODELING OF BE (Back Enhanced) SOI MOSFET TRANSISTORS

Grant number: 15/25100-3
Support type:Scholarships in Brazil - Master
Effective date (Start): March 01, 2016
Effective date (End): February 28, 2018
Field of knowledge:Engineering - Electrical Engineering
Principal researcher:João Antonio Martino
Grantee:Leonardo Shimizu Yojo
Home Institution: Escola Politécnica (EP). Universidade de São Paulo (USP). São Paulo , SP, Brazil

Abstract

In order to improve the performance of transistors and make integrated circuits faster, the strategy of reducing the scale of transistors was used in the past, until parasitic effects due to this reduction of dimensions began to appear and degraded its performance. In this context, the SOI MOSFET technology has emerged as an alternative to the integrated circuit industry to surpass these undesirable effects. Therefore, the study of these new SOI MOSFET structures made in Brazil is very important for the country to obtain a technological level of independence from other countries with more developed electronics industry.This research project proposes the study of the electrical characteristics, physical principles and the parameters that describe a device built using the SOI technology, with especial focus on the BE SOI MOSFET transistor built in the Laboratório de Sistemas Integráveis (LSI) of the University of São Paulo (USP), which has a fabrication patent submission under the number in INPI BR 10 2015 020974 6. This device differs from others due to its simple fabrication process and due its flexibility of operation. This device is currently in its second version, in which the flexibility of operation has been proved: it can work as a p type transistor (BE SOI pMOS) or as a n type transistor (BE SOI nMOS). As it is a new kind of transistor, it is necessary to perform a deeper study of its electrical characteristics and to model it for both types (p and n), which will be done in an unprecedented way in this work.

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