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An LLVM based back end compiler for accelerating applications on FPGAs

Grant number: 15/16308-0
Support Opportunities:Scholarships in Brazil - Scientific Initiation
Effective date (Start): October 01, 2015
Effective date (End): September 30, 2016
Field of knowledge:Physical Sciences and Mathematics - Computer Science - Computer Systems
Principal Investigator:Ricardo Menotti
Grantee:Gabriel Nagatomo Tutui
Host Institution: Centro de Ciências Exatas e de Tecnologia (CCET). Universidade Federal de São Carlos (UFSCAR). São Carlos , SP, Brazil


FPGAs have become an interesting alternative to the acceleration of applications both in embedded systems and in high-performance computing. The main barrier to wider use of this technology is the difficulty to program these devices. This project aims to facilitate the automatic hardware generation from the intermediate representation of the LLVM compiler. Known techniques in our research group will be used to build an efficient hardware pipeline from code sections previously selected in programs written in C. The DE2i-150 kit, which combines an Intel processor and Altera Cyclone IV FPGA, will be used as a platform to test a set of applications with code sections accelerated by hardware.

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