Program decompressing system for RISC processor

Abstract

The purpose of this work is to develop a computer program decompressing system for Risc processors. The central idea of this approach is to encode expression trees and operand sequences separately using Huffman coding. Decompressing the program is done using a decompression module based on dictionaries. The growth of the market for dedicated systems (embedded systems) has led to the emergence of a project method known as System- On-a-Chip (SOC), where a processor, integrated with memories, DMAs, I/T ports, and other modules, is designed to minimize the cost of the system. One of the most difficult tasks in an SOC is to make the application program fit within the specified area of silicone (microprocessor). This problem is particularly critical for industry. IDEA! Sistemas Eletrônicos has collaborated on research into the compression of programs on SOCs developed by Prof. Guido Araújo and his doctoral students at IC-Unicamp. The idea consists of storing the compressed code in on-chip memory, decompressing it online during the search for instructions. The commercial feasibility of this proposal was recently demonstrated by the launch by IBM of a PowerPC (CodePack) processor with similar but fewer features. Research into this project has already reached the point where the results achieved encourage its commercial sale. The final objective of this proposal is to implement a decompressing system to be sold as core software in IP (Intellectual Property) providers. (AU)