Understanding and exploiting energy/performance tradeoffs in concurrent algorithms

Abstract

Microarchitectural limitations and high energy dissipation have forced the semiconductor industry to shift from single-core processors to multicores. This new approach allows the transistor growth foresaw by Moore's law to continue but, instead of increasing the clock frequency and exploiting instruction level parallelism, more cores are being integrated into a single die. This shift has caused a tremendous impact in software development, as parallel programming models must be used to achieve performance. Unfortunately, there is no definite model for expressing parallelism and a lot of research has been carried out in this direction by both industry and academia. New programming models and concurrent algorithms proposals are usually evaluated with performance in mind. However, it is well-known that the impact caused by energy consumption is equally important and becomes critical in mobile devices. This research proposal approaches a problem still not well exploited in the current literature: the study of the energy/performance tradeoff in concurrent algorithms. As a result of this study, we intend to propose changes in the algorithms (using Dynamic Voltage and Frequency Scaling techniques, for instance) in order to maximize the energy/performance tradeoff gains. (AU)