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TCAD simulation of advanced semiconductor devices

Grant number: 23/00123-7
Support Opportunities:Regular Research Grants
Duration: May 01, 2023 - April 30, 2025
Field of knowledge:Engineering - Electrical Engineering
Principal Investigator:Maria Glória Caño de Andrade
Grantee:Maria Glória Caño de Andrade
Host Institution: Instituto de Ciência e Tecnologia. Universidade Estadual Paulista (UNESP). Campus de Sorocaba. Sorocaba , SP, Brazil
Associated researchers:Everson Martins ; Lucas Petersen Barbosa Lima ; Marcos Vinicius Puydinger dos Santos ; Nilton Graziano Junior

Abstract

The proposed project is a contribution to the technological development of Micro and Nano electronics in Brazil since it intends to research advanced semiconductor devices. These devices are promising structures with manometric dimensions, planar structures with extremely thin buried oxide called UTBOX (Ultra-Thin Buried Oxide), non-planar structures denominated Bulk, and SOI transistors with multiple gate (also called FinFET or 3D transistor, Nanosheet, Forksheet, CFET and nanowires devices) and High Electron Mobility Transistors (HEMTs) for Radio Frequency applications, produced with new types of materials, innovative techniques of manufacturing, different sizes and configurations which will replace the currently used devices.The electric and analog performance of these devices will be considered as a function of its dimensions, temperatures and radiation. This study will be done experimentally and through numerical simulations. Low-Frequency (LF) noise will be also investigated. Generally, the signal spectra for semiconductor devices are composed of number fluctuations related flicker noise with on top generation and recombination noise humps, which become more pronounced at higher gate voltage. The methodology for the development of this work consists of four main parts. Firstly, the structure will be constructed in a virtual environment to perform numerical simulations. In this project part, the simulations will have the goal of getting the trends of the main electrical characteristics of semiconductor devices.In the second part, the simulations will be calibrated/validated using advanced devices already manufactured (but in an experimental phase) by imec (interuniversity microelectronics center) in Leuven (Belgium) and also by devices described (studied) in the literature and/or manufactured by others. research centers (Brazil/unicamp) and the world).In the third phase, with the simulator calibrated, several simulations will be carried out in order to understand/find physical mechanisms involved in these types of devices. And finally (fourth part), new structures of devices will be designed (through simulations) in order to eliminate/attenuate the existing problems in the current existing devices. (AU)

Articles published in Agência FAPESP Newsletter about the research grant:
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